TY  - CHAP
A1  - Otten, W.
A1  - Glösekötter, P.
A1  - Velling, P.
A1  - Brennemann, A.
A1  - Prost, W.
A1  - Goser, K. F.
A1  - Tegude, F.- J.
T1  - InP-Based Monolithic Integrated RTD/HBT MOBILE FOR Logic Circuits
T2  - InP and Related Materials Conference
Y1  - 2001
CY  - Nara
ET  - May
ER  - 
TY  - JOUR
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Circuit and Application Asepects of Tunneling Devices in a MOBILE configuration
JF  - Special Issue of the International Journal of Circuit Theory and  Applications "Nanoelectronic Circuit", 31:83-103 (invited paper)
Y1  - 2003
ER  - 
TY  - JOUR
A1  - Pacha, C.
A1  - Auer, U.
A1  - Burwick, C.
A1  - Glösekötter, P.
A1  - Brennemann, A.
A1  - Prost, W.
A1  - Tegude, F. J.
A1  - Goser, K. F.
T1  - Thresold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices
JF  - IEEE Transactions on Very Larg Scale Integration (VLSI) Systems
Y1  - 2000
VL  - October
SP  - 558
EP  - 572
ER  - 
TY  - JOUR
A1  - Pacha, C.
A1  - Kessler, O.
A1  - Glösekötter, P.
A1  - Goser, K. F.
A1  - Prost, W.
A1  - Brennemann, A.
A1  - Auer, U.
A1  - Tegude, F. J.
T1  - Parallel Adder Design with Reduced Circuit Complexity Using Resonant  Tunneling Transistors and Threshold Logic
JF  - Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers
Y1  - 2000
U6  - http://dx.doi.org/10.1023
SP  - 7
EP  - 25
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Pseudo Dynamic Gate Design based on the Resonant-Tunneling-Bipolar-Transistor (RTBT)
T2  - 32nd European Solid-State Device Research Conference (ESSDERC)
Y1  - 2002
CY  - Florence, Italy
ET  - Sept. 24-26
ER  - 
TY  - CHAP
A1  - Prost, W.
A1  - Kim, S. O.
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Goser, K. F.
A1  - Tegude, F.- J.
T1  - Experimental Threshold Logic implementations based on Resonant Tunneling Diodes
T2  - Sepc. Session on "Implementation and Applications of Threshold  Logic" of the 9th IEEE International Conference on Electronics, Circuit  and Systems
Y1  - 2002
CY  - Dubrovnik, Croatia
ET  - Sept. 15-18
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Asynchronous Circuit Design Based on the RTBT  Monostable-Bistable-Logic-Transiton-Element (MOBILE)
T2  - 15th Symposium on Integrated Circuits and System Design, Chip in the Pampa
Y1  - 2002
CY  - Porto Alegre, RS, Brazil
ET  - Sept. 9-14
ER  - 
TY  - CHAP
A1  - Prost, W.
A1  - Glösekötter, P.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Goser, K. F.
A1  - Tegude, F.- J.
T1  - High-speed operation of InP-based RTD/HBT MOBILE
T2  - 26th WOCSDICE
Y1  - 2002
CY  - Chernogolovka, Russia
ET  - May 21-26
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Design and Simulation of Pseudo Dynamic Logic Circuits Based on RTBTs
T2  - 13th Workshop on Physical Simulation of Semiconductor Devices
Y1  - 2001
CY  - Ilkley, West Yorkshire, UK
ET  - March 25-26
ER  - 
TY  - CHAP
A1  - Pacha, C.
A1  - Prost, W.
A1  - Tegude, F. J.
A1  - Glösekötter, P.
A1  - Goser, K. F.
T1  - Resonant Tunneling Device Logic: A Circuit Designer's Perspective
T2  - European Conference on Circuit Theory and Design
Y1  - 2001
CY  - Espoo, Finland
ET  - August 28-31
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - Goser, K. F.
A1  - Wirth, G. I.
A1  - Prost, W.
A1  - Auer, U.
A1  - Agethen, M.
A1  - Tegude, F. J.
T1  - Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor
T2  - SBCCI
Y1  - 2000
CY  - Manaus, Brasil
ET  - Sept. 18-24
ER  - 
TY  - CHAP
A1  - Pacha, C.
A1  - Glösekötter, P.
A1  - Goser, K. F.
A1  - Auer, U.
A1  - Prost, W.
A1  - Tegude, F. J.
T1  - Resonant Tunneling Transistors for Threshold Logic Circuit Applications
T2  - GLS-VLSI - 9th IEEE Great Lakes Symposium on VLSI
Y1  - 1999
SP  - 344
EP  - 345
CY  - Ann Arbor, MI
ET  - March 4-6
ER  - 
TY  - CHAP
A1  - Janßen, G.
A1  - Prost, W.
A1  - Auer, U.
A1  - Tegude, F.- J.
A1  - Pacha, C.
A1  - Glösekötter, P.
A1  - Goser, K. F.
A1  - van de Roer, T.
A1  - Foerster, A.
A1  - Malindretos, J.
A1  - Kelly, M. J.
T1  - Logic Circuits with Reduced Complexity based on Devices with Higher Functionality
T2  - Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE)
Y1  - 1999
CY  - Mierlo, The Netherlands
ET  - Nov. 24-25
ER  -