TY - CHAP A1 - Glösekötter, P. A1 - Kanstein, A. A1 - Jung, S. A1 - Goser, K. F. T1 - Implementation of a RBF Network Based on Possibilistic Reasoning, ISSN 1089-6503 T2 - Proceedings of the 24th EUROMICRO conference Y1 - 1998 SN - 0-8186-8646-4 SP - 677 EP - 682 CY - Västeras, Sweden ET - August 25-27 ER - TY - CHAP A1 - Glösekötter, P. A1 - Pacha, C. A1 - Goser, K. F. T1 - Design of Arithmetic Circuits Using the RTBT T2 - ITG-Fachbericht 162, Mikroelektronik für die Informationstechnik Y1 - 2000 SN - 3-8007-2586-X SP - 147 EP - 150 ET - Nov. 20-21 ER - TY - CHAP A1 - Glösekötter, P. A1 - Pacha, C. A1 - Goser, K. F. T1 - Threshold Logic Circuit Design using the RTBT T2 - Kleinheubacher Berichte Y1 - 2000 ET - Sept. 25-29 ER - TY - CHAP A1 - Glösekötter, P. A1 - Pacha, C. A1 - Goser, K. F. T1 - Associative Matrix for Nano-scale Integratd Circuits T2 - 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (MicroNeuro) Y1 - 1999 SP - 352 EP - 358 PB - IEEE Computer Society Press, Los Alamitos, CA CY - Granada, Spain ET - March ER - TY - CHAP A1 - Glösekötter, P. A1 - Pacha, C. A1 - Goser, K. F. A1 - Wirth, G. I. A1 - Prost, W. A1 - Auer, U. A1 - Agethen, M. A1 - Tegude, F. J. T1 - Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor T2 - SBCCI Y1 - 2000 CY - Manaus, Brasil ET - Sept. 18-24 ER - TY - JOUR A1 - Glösekötter, P. A1 - Prost, W. A1 - Pacha, C. A1 - Kim, S. O. A1 - van Husen, H. A1 - Reimann, T. A1 - Tegude, F.- J. A1 - Goser, K. F. T1 - Circuit and Application Asepects of Tunneling Devices in a MOBILE configuration JF - Special Issue of the International Journal of Circuit Theory and Applications "Nanoelectronic Circuit", 31:83-103 (invited paper) Y1 - 2003 ER - TY - CHAP A1 - Glösekötter, P. A1 - Prost, W. A1 - Pacha, C. A1 - Kim, S. O. A1 - van Husen, H. A1 - Reimann, T. A1 - Tegude, F.- J. A1 - Goser, K. F. T1 - Pseudo Dynamic Gate Design based on the Resonant-Tunneling-Bipolar-Transistor (RTBT) T2 - 32nd European Solid-State Device Research Conference (ESSDERC) Y1 - 2002 CY - Florence, Italy ET - Sept. 24-26 ER - TY - CHAP A1 - Glösekötter, P. A1 - Prost, W. A1 - Pacha, C. A1 - Kim, S. O. A1 - van Husen, H. A1 - Reimann, T. A1 - Tegude, F.- J. A1 - Goser, K. F. T1 - Asynchronous Circuit Design Based on the RTBT Monostable-Bistable-Logic-Transiton-Element (MOBILE) T2 - 15th Symposium on Integrated Circuits and System Design, Chip in the Pampa Y1 - 2002 CY - Porto Alegre, RS, Brazil ET - Sept. 9-14 ER - TY - CHAP A1 - Glösekötter, P. A1 - Prost, W. A1 - Pacha, C. A1 - Kim, S. O. A1 - van Husen, H. A1 - Reimann, T. A1 - Tegude, F.- J. A1 - Goser, K. F. T1 - Design and Simulation of Pseudo Dynamic Logic Circuits Based on RTBTs T2 - 13th Workshop on Physical Simulation of Semiconductor Devices Y1 - 2001 CY - Ilkley, West Yorkshire, UK ET - March 25-26 ER - TY - CHAP A1 - Janßen, G. A1 - Prost, W. A1 - Auer, U. A1 - Tegude, F.- J. A1 - Pacha, C. A1 - Glösekötter, P. A1 - Goser, K. F. A1 - van de Roer, T. A1 - Foerster, A. A1 - Malindretos, J. A1 - Kelly, M. J. T1 - Logic Circuits with Reduced Complexity based on Devices with Higher Functionality T2 - Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE) Y1 - 1999 CY - Mierlo, The Netherlands ET - Nov. 24-25 ER -