TY  - CHAP
A1  - Pacha, C.
A1  - Glösekötter, P.
A1  - Goser, K. F.
T1  - Adiabatic Switching and Power Dissipation of Dynamic Resonant Tunneling Device Logic Circuits
T2  - 3rd Workshop on Innovative Circuits and Systems for Nano Elektronics, Nano-EL98
Y1  - 1998
PB  - Munich Paper C2/1-6
ET  - Sept. 5-6
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Pseudo Dynamic Gate Design based on the Resonant-Tunneling-Bipolar-Transistor (RTBT)
T2  - 32nd European Solid-State Device Research Conference (ESSDERC)
Y1  - 2002
CY  - Florence, Italy
ET  - Sept. 24-26
ER  - 
TY  - CHAP
A1  - Prost, W.
A1  - Kim, S. O.
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Goser, K. F.
A1  - Tegude, F.- J.
T1  - Experimental Threshold Logic implementations based on Resonant Tunneling Diodes
T2  - Sepc. Session on "Implementation and Applications of Threshold  Logic" of the 9th IEEE International Conference on Electronics, Circuit  and Systems
Y1  - 2002
CY  - Dubrovnik, Croatia
ET  - Sept. 15-18
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Asynchronous Circuit Design Based on the RTBT  Monostable-Bistable-Logic-Transiton-Element (MOBILE)
T2  - 15th Symposium on Integrated Circuits and System Design, Chip in the Pampa
Y1  - 2002
CY  - Porto Alegre, RS, Brazil
ET  - Sept. 9-14
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Prost, W.
A1  - Pacha, C.
A1  - Kim, S. O.
A1  - van Husen, H.
A1  - Reimann, T.
A1  - Tegude, F.- J.
A1  - Goser, K. F.
T1  - Design and Simulation of Pseudo Dynamic Logic Circuits Based on RTBTs
T2  - 13th Workshop on Physical Simulation of Semiconductor Devices
Y1  - 2001
CY  - Ilkley, West Yorkshire, UK
ET  - March 25-26
ER  - 
TY  - CHAP
A1  - Pacha, C.
A1  - Prost, W.
A1  - Tegude, F. J.
A1  - Glösekötter, P.
A1  - Goser, K. F.
T1  - Resonant Tunneling Device Logic: A Circuit Designer's Perspective
T2  - European Conference on Circuit Theory and Design
Y1  - 2001
CY  - Espoo, Finland
ET  - August 28-31
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - Goser, K. F.
T1  - Design of Arithmetic Circuits Using the RTBT
T2  - ITG-Fachbericht 162, Mikroelektronik für die Informationstechnik
Y1  - 2000
SN  - 3-8007-2586-X
SP  - 147
EP  - 150
ET  - Nov. 20-21
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - Goser, K. F.
T1  - Threshold Logic Circuit Design using the RTBT
T2  - Kleinheubacher Berichte
Y1  - 2000
ET  - Sept. 25-29
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - Goser, K. F.
A1  - Wirth, G. I.
A1  - Prost, W.
A1  - Auer, U.
A1  - Agethen, M.
A1  - Tegude, F. J.
T1  - Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor
T2  - SBCCI
Y1  - 2000
CY  - Manaus, Brasil
ET  - Sept. 18-24
ER  - 
TY  - CHAP
A1  - Glösekötter, P.
A1  - Pacha, C.
A1  - Goser, K. F.
T1  - Associative Matrix for Nano-scale Integratd Circuits
T2  - 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (MicroNeuro)
Y1  - 1999
SP  - 352
EP  - 358
PB  - IEEE Computer Society Press, Los Alamitos, CA
CY  - Granada, Spain
ET  - March
ER  -