@incollection{JanssenProstAueretal.1999,
  author    = {Janßen, G. and Prost, W. and Auer, U. and Tegude, F.- J. and Pacha, C. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and van de Roer, T. and Foerster, A. and Malindretos, J. and Kelly, M. J.},
  title     = {Logic Circuits with Reduced Complexity based on Devices with Higher Functionality},
  series = {Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE)},
  booktitle = {Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE)},
  edition   = {Nov. 24-25},
  address   = {Mierlo, The Netherlands},
  year      = {1999},
  language  = {en}
}
@article{GloesekoetterProstPachaetal.2003,
  author    = {Gl{\"o}sek{\"o}tter, P. and Prost, W. and Pacha, C. and Kim, S. O. and van Husen, H. and Reimann, T. and Tegude, F.- J. and Goser, K. F.},
  title     = {Circuit and Application Asepects of Tunneling Devices in a MOBILE configuration},
  series = {Special Issue of the International Journal of Circuit Theory and Applications "Nanoelectronic Circuit", 31:83-103 (invited paper)},
  journal   = {Special Issue of the International Journal of Circuit Theory and Applications "Nanoelectronic Circuit", 31:83-103 (invited paper)},
  year      = {2003},
  language  = {en}
}
@article{PachaAuerBurwicketal.2000,
  author    = {Pacha, C. and Auer, U. and Burwick, C. and Gl{\"o}sek{\"o}tter, P. and Brennemann, A. and Prost, W. and Tegude, F. J. and Goser, K. F.},
  title     = {Thresold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices},
  series = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  volume    = {October},
  journal   = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  pages     = {558 -- 572},
  year      = {2000},
  language  = {en}
}
@article{PachaKesslerGloesekoetteretal.2000,
  author    = {Pacha, C. and Kessler, O. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and Prost, W. and Brennemann, A. and Auer, U. and Tegude, F. J.},
  title     = {Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic},
  series = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers},
  journal   = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers},
  doi       = {10.1023},
  pages     = {7 -- 25},
  year      = {2000},
  language  = {en}
}
@incollection{GloesekoetterProstPachaetal.2002,
  author    = {Gl{\"o}sek{\"o}tter, P. and Prost, W. and Pacha, C. and Kim, S. O. and van Husen, H. and Reimann, T. and Tegude, F.- J. and Goser, K. F.},
  title     = {Pseudo Dynamic Gate Design based on the Resonant-Tunneling-Bipolar-Transistor (RTBT)},
  series = {32nd European Solid-State Device Research Conference (ESSDERC)},
  booktitle = {32nd European Solid-State Device Research Conference (ESSDERC)},
  edition   = {Sept. 24-26},
  address   = {Florence, Italy},
  year      = {2002},
  language  = {en}
}
@incollection{ProstKimGloesekoetteretal.2002,
  author    = {Prost, W. and Kim, S. O. and Gl{\"o}sek{\"o}tter, P. and Pacha, C. and van Husen, H. and Reimann, T. and Goser, K. F. and Tegude, F.- J.},
  title     = {Experimental Threshold Logic implementations based on Resonant Tunneling Diodes},
  series = {Sepc. Session on "Implementation and Applications of Threshold Logic" of the 9th IEEE International Conference on Electronics, Circuit and Systems},
  booktitle = {Sepc. Session on "Implementation and Applications of Threshold Logic" of the 9th IEEE International Conference on Electronics, Circuit and Systems},
  edition   = {Sept. 15-18},
  address   = {Dubrovnik, Croatia},
  year      = {2002},
  language  = {mul}
}
@incollection{GloesekoetterProstPachaetal.2002,
  author    = {Gl{\"o}sek{\"o}tter, P. and Prost, W. and Pacha, C. and Kim, S. O. and van Husen, H. and Reimann, T. and Tegude, F.- J. and Goser, K. F.},
  title     = {Asynchronous Circuit Design Based on the RTBT Monostable-Bistable-Logic-Transiton-Element (MOBILE)},
  series = {15th Symposium on Integrated Circuits and System Design, Chip in the Pampa},
  booktitle = {15th Symposium on Integrated Circuits and System Design, Chip in the Pampa},
  edition   = {Sept. 9-14},
  address   = {Porto Alegre, RS, Brazil},
  year      = {2002},
  language  = {en}
}
@incollection{ProstGloesekoetterKimetal.2002,
  author    = {Prost, W. and Gl{\"o}sek{\"o}tter, P. and Kim, S. O. and van Husen, H. and Reimann, T. and Goser, K. F. and Tegude, F.- J.},
  title     = {High-speed operation of InP-based RTD/HBT MOBILE},
  series = {26th WOCSDICE},
  booktitle = {26th WOCSDICE},
  edition   = {May 21-26},
  address   = {Chernogolovka, Russia},
  year      = {2002},
  language  = {en}
}
@incollection{GloesekoetterProstPachaetal.2001,
  author    = {Gl{\"o}sek{\"o}tter, P. and Prost, W. and Pacha, C. and Kim, S. O. and van Husen, H. and Reimann, T. and Tegude, F.- J. and Goser, K. F.},
  title     = {Design and Simulation of Pseudo Dynamic Logic Circuits Based on RTBTs},
  series = {13th Workshop on Physical Simulation of Semiconductor Devices},
  booktitle = {13th Workshop on Physical Simulation of Semiconductor Devices},
  edition   = {March 25-26},
  address   = {Ilkley, West Yorkshire, UK},
  year      = {2001},
  language  = {en}
}
@incollection{OttenGloesekoetterVellingetal.2001,
  author    = {Otten, W. and Gl{\"o}sek{\"o}tter, P. and Velling, P. and Brennemann, A. and Prost, W. and Goser, K. F. and Tegude, F.- J.},
  title     = {InP-Based Monolithic Integrated RTD/HBT MOBILE FOR Logic Circuits},
  series = {InP and Related Materials Conference},
  booktitle = {InP and Related Materials Conference},
  edition   = {May},
  address   = {Nara},
  year      = {2001},
  language  = {en}
}
@incollection{PachaProstTegudeetal.2001,
  author    = {Pacha, C. and Prost, W. and Tegude, F. J. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F.},
  title     = {Resonant Tunneling Device Logic: A Circuit Designer's Perspective},
  series = {European Conference on Circuit Theory and Design},
  booktitle = {European Conference on Circuit Theory and Design},
  edition   = {August 28-31},
  address   = {Espoo, Finland},
  year      = {2001},
  language  = {mul}
}
@incollection{GloesekoetterPachaGoseretal.2000,
  author    = {Gl{\"o}sek{\"o}tter, P. and Pacha, C. and Goser, K. F. and Wirth, G. I. and Prost, W. and Auer, U. and Agethen, M. and Tegude, F. J.},
  title     = {Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor},
  series = {SBCCI},
  booktitle = {SBCCI},
  edition   = {Sept. 18-24},
  address   = {Manaus, Brasil},
  year      = {2000},
  language  = {en}
}
@incollection{PachaGloesekoetterGoseretal.1999,
  author    = {Pacha, C. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and Auer, U. and Prost, W. and Tegude, F. J.},
  title     = {Resonant Tunneling Transistors for Threshold Logic Circuit Applications},
  series = {GLS-VLSI - 9th IEEE Great Lakes Symposium on VLSI},
  booktitle = {GLS-VLSI - 9th IEEE Great Lakes Symposium on VLSI},
  edition   = {March 4-6},
  address   = {Ann Arbor, MI},
  pages     = {344 -- 345},
  year      = {1999},
  language  = {en}
}