@incollection{PachaGloesekoetterGoser1998, author = {Pacha, C. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F.}, title = {Adiabatic Switching and Power Dissipation of Dynamic Resonant Tunneling Device Logic Circuits}, series = {3rd Workshop on Innovative Circuits and Systems for Nano Elektronics, Nano-EL98}, booktitle = {3rd Workshop on Innovative Circuits and Systems for Nano Elektronics, Nano-EL98}, edition = {Sept. 5-6}, publisher = {Munich Paper C2/1-6}, year = {1998}, language = {en} } @incollection{GloesekoetterPachaGoser1999, author = {Gl{\"o}sek{\"o}tter, P. and Pacha, C. and Goser, K. F.}, title = {Associative Matrix for Nano-scale Integratd Circuits}, series = {7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (MicroNeuro)}, booktitle = {7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (MicroNeuro)}, edition = {March}, publisher = {IEEE Computer Society Press, Los Alamitos, CA}, address = {Granada, Spain}, pages = {352 -- 358}, year = {1999}, language = {en} } @incollection{PachaGloesekoetterGoseretal.1999, author = {Pacha, C. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and Auer, U. and Prost, W. and Tegude, F. J.}, title = {Resonant Tunneling Transistors for Threshold Logic Circuit Applications}, series = {GLS-VLSI - 9th IEEE Great Lakes Symposium on VLSI}, booktitle = {GLS-VLSI - 9th IEEE Great Lakes Symposium on VLSI}, edition = {March 4-6}, address = {Ann Arbor, MI}, pages = {344 -- 345}, year = {1999}, language = {en} } @incollection{JanssenProstAueretal.1999, author = {Janßen, G. and Prost, W. and Auer, U. and Tegude, F.- J. and Pacha, C. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and van de Roer, T. and Foerster, A. and Malindretos, J. and Kelly, M. J.}, title = {Logic Circuits with Reduced Complexity based on Devices with Higher Functionality}, series = {Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE)}, booktitle = {Proc. 'Workshop on Semiconductor Advances for Future Electronics (SAFE)}, edition = {Nov. 24-25}, address = {Mierlo, The Netherlands}, year = {1999}, language = {en} } @article{PachaAuerBurwicketal.2000, author = {Pacha, C. and Auer, U. and Burwick, C. and Gl{\"o}sek{\"o}tter, P. and Brennemann, A. and Prost, W. and Tegude, F. J. and Goser, K. F.}, title = {Thresold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices}, series = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems}, volume = {October}, journal = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems}, pages = {558 -- 572}, year = {2000}, language = {en} } @article{PachaKesslerGloesekoetteretal.2000, author = {Pacha, C. and Kessler, O. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and Prost, W. and Brennemann, A. and Auer, U. and Tegude, F. J.}, title = {Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic}, series = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers}, journal = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers}, doi = {10.1023}, pages = {7 -- 25}, year = {2000}, language = {en} } @incollection{GloesekoetterPachaGoser2000, author = {Gl{\"o}sek{\"o}tter, P. and Pacha, C. and Goser, K. F.}, title = {Design of Arithmetic Circuits Using the RTBT}, series = {ITG-Fachbericht 162, Mikroelektronik f{\"u}r die Informationstechnik}, booktitle = {ITG-Fachbericht 162, Mikroelektronik f{\"u}r die Informationstechnik}, edition = {Nov. 20-21}, isbn = {3-8007-2586-X}, pages = {147 -- 150}, year = {2000}, language = {en} } @incollection{GloesekoetterPachaGoser2000, author = {Gl{\"o}sek{\"o}tter, P. and Pacha, C. and Goser, K. F.}, title = {Threshold Logic Circuit Design using the RTBT}, series = {Kleinheubacher Berichte}, booktitle = {Kleinheubacher Berichte}, edition = {Sept. 25-29}, year = {2000}, language = {en} } @incollection{GloesekoetterPachaGoseretal.2000, author = {Gl{\"o}sek{\"o}tter, P. and Pacha, C. and Goser, K. F. and Wirth, G. I. and Prost, W. and Auer, U. and Agethen, M. and Tegude, F. J.}, title = {Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor}, series = {SBCCI}, booktitle = {SBCCI}, edition = {Sept. 18-24}, address = {Manaus, Brasil}, year = {2000}, language = {en} } @incollection{GloesekoetterProstPachaetal.2001, author = {Gl{\"o}sek{\"o}tter, P. and Prost, W. and Pacha, C. and Kim, S. O. and van Husen, H. and Reimann, T. and Tegude, F.- J. and Goser, K. F.}, title = {Design and Simulation of Pseudo Dynamic Logic Circuits Based on RTBTs}, series = {13th Workshop on Physical Simulation of Semiconductor Devices}, booktitle = {13th Workshop on Physical Simulation of Semiconductor Devices}, edition = {March 25-26}, address = {Ilkley, West Yorkshire, UK}, year = {2001}, language = {en} }