@article{PachaAuerBurwicketal.2000,
  author    = {Pacha, C. and Auer, U. and Burwick, C. and Gl{\"o}sek{\"o}tter, P. and Brennemann, A. and Prost, W. and Tegude, F. J. and Goser, K. F.},
  title     = {Thresold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices},
  series = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  volume    = {October},
  journal   = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  pages     = {558 -- 572},
  year      = {2000},
  language  = {en}
}