@article{PachaAuerBurwicketal.2000,
  author    = {Pacha, C. and Auer, U. and Burwick, C. and Gl{\"o}sek{\"o}tter, P. and Brennemann, A. and Prost, W. and Tegude, F. J. and Goser, K. F.},
  title     = {Thresold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices},
  series = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  volume    = {October},
  journal   = {IEEE Transactions on Very Larg Scale Integration (VLSI) Systems},
  pages     = {558 -- 572},
  year      = {2000},
  language  = {en}
}
@article{PachaKesslerGloesekoetteretal.2000,
  author    = {Pacha, C. and Kessler, O. and Gl{\"o}sek{\"o}tter, P. and Goser, K. F. and Prost, W. and Brennemann, A. and Auer, U. and Tegude, F. J.},
  title     = {Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic},
  series = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers},
  journal   = {Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers},
  doi       = {10.1023},
  pages     = {7 -- 25},
  year      = {2000},
  language  = {en}
}
@incollection{OttenGloesekoetterVellingetal.2001,
  author    = {Otten, W. and Gl{\"o}sek{\"o}tter, P. and Velling, P. and Brennemann, A. and Prost, W. and Goser, K. F. and Tegude, F.- J.},
  title     = {InP-Based Monolithic Integrated RTD/HBT MOBILE FOR Logic Circuits},
  series = {InP and Related Materials Conference},
  booktitle = {InP and Related Materials Conference},
  edition   = {May},
  address   = {Nara},
  year      = {2001},
  language  = {en}
}